fix latch
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e064604cf0
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@ -203,8 +203,8 @@ namespace PIC_Simulator
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lvSpecial.Items[3].SubItems[1].Text = string.Format("0b{0}", Convert.ToString(programm.GetRegisterOhneBank(PICProgramm.ADDR_OPTION), 2).PadLeft(8, '0'));
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lvSpecial.Items[3].SubItems[1].Text = string.Format("0b{0}", Convert.ToString(programm.GetRegisterOhneBank(PICProgramm.ADDR_OPTION), 2).PadLeft(8, '0'));
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lvSpecial.Items[4].SubItems[1].Text = string.Format("0b{0}", Convert.ToString(programm.GetRegisterOhneBank(PICProgramm.ADDR_INTCON), 2).PadLeft(8, '0'));
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lvSpecial.Items[4].SubItems[1].Text = string.Format("0b{0}", Convert.ToString(programm.GetRegisterOhneBank(PICProgramm.ADDR_INTCON), 2).PadLeft(8, '0'));
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lvSpecial.Items[5].SubItems[1].Text = string.Format("{0}ms", programm.Stepcount * int.Parse(insertTime.Text));
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lvSpecial.Items[5].SubItems[1].Text = string.Format("{0}ms", programm.Stepcount * int.Parse(insertTime.Text));
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lvSpecial.Items[6].SubItems[1].Text = "0b" + Convert.ToString(programm.Register[PICProgramm.ADDR_PORT_A], 2).PadLeft(8, '0');
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lvSpecial.Items[6].SubItems[1].Text = "0b" + Convert.ToString(programm.Latch_RA, 2).PadLeft(8, '0');
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lvSpecial.Items[7].SubItems[1].Text = "0b" + Convert.ToString(programm.Register[PICProgramm.ADDR_PORT_B], 2).PadLeft(8, '0');
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lvSpecial.Items[7].SubItems[1].Text = "0b" + Convert.ToString(programm.Latch_RB, 2).PadLeft(8, '0');
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lvSpecial.Items[8].SubItems[1].Text = programm.GetRegisterOhneBank(PICProgramm.ADDR_STATUS, PICProgramm.STATUS_BIT_C) ? "1" : "0";
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lvSpecial.Items[8].SubItems[1].Text = programm.GetRegisterOhneBank(PICProgramm.ADDR_STATUS, PICProgramm.STATUS_BIT_C) ? "1" : "0";
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lvSpecial.Items[9].SubItems[1].Text = programm.GetRegisterOhneBank(PICProgramm.ADDR_STATUS, PICProgramm.STATUS_BIT_DC) ? "1" : "0";
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lvSpecial.Items[9].SubItems[1].Text = programm.GetRegisterOhneBank(PICProgramm.ADDR_STATUS, PICProgramm.STATUS_BIT_DC) ? "1" : "0";
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lvSpecial.Items[10].SubItems[1].Text = programm.GetRegisterOhneBank(PICProgramm.ADDR_STATUS, PICProgramm.STATUS_BIT_Z) ? "1" : "0";
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lvSpecial.Items[10].SubItems[1].Text = programm.GetRegisterOhneBank(PICProgramm.ADDR_STATUS, PICProgramm.STATUS_BIT_Z) ? "1" : "0";
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@ -858,29 +858,53 @@ namespace PIC_Simulator.PIC
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Zaehler.Reset();
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Zaehler.Reset();
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}
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}
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Register[index] = (byte)(wert & 0xFF);
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if (index == ADDR_PORT_A)
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if (index == ADDR_PORT_A || index == ADDR_TRIS_A)
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{
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{
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var ra = Register[ADDR_PORT_A];
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var ta = Register[ADDR_TRIS_A];
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var ta = Register[ADDR_TRIS_A];
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Latch_RA = (byte)(wert & 0xFF);
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for (uint i = 0; i < 8; i++)
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for (uint i = 0; i < 8; i++)
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{
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{
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if (!GetBit(ta, i)) Latch_RA = (byte)SetBit(Latch_RA, i, GetBit(ra, i));
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if (!GetBit(ta, i)) Register[ADDR_PORT_A] = SetBit(Register[ADDR_PORT_A], i, GetBit(Latch_RA, i));
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}
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}
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return;
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}
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}
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if (index == ADDR_PORT_B || index == ADDR_TRIS_B)
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if (index == ADDR_PORT_B)
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{
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{
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var rb = Register[ADDR_PORT_B];
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var tb = Register[ADDR_TRIS_B];
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var tb = Register[ADDR_TRIS_B];
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Latch_RB = (byte)(wert & 0xFF);
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for (uint i = 0; i < 8; i++)
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for (uint i = 0; i < 8; i++)
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{
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{
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if (!GetBit(tb, i)) Latch_RB = (byte)SetBit(Latch_RB, i, GetBit(rb, i));
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if (!GetBit(tb, i)) Register[ADDR_PORT_B] = SetBit(Register[ADDR_PORT_B], i, GetBit(Latch_RB, i));
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}
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return;
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}
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if (index == ADDR_TRIS_A)
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{
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var ta = (byte)(wert & 0xFF);
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for (uint i = 0; i < 8; i++)
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{
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if (!GetBit(ta, i)) Register[ADDR_PORT_A] = SetBit(Register[ADDR_PORT_A], i, GetBit(Latch_RA, i));
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}
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}
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}
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}
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if (index == ADDR_TRIS_B)
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{
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var tb = (byte)(wert & 0xFF);
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for (uint i = 0; i < 8; i++)
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{
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if (!GetBit(tb, i)) Register[ADDR_PORT_B] = SetBit(Register[ADDR_PORT_B], i, GetBit(Latch_RB, i));
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}
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}
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Register[index] = (byte)(wert & 0xFF);
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}
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}
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private void Interrupt_RB(byte alt, byte neu)
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private void Interrupt_RB(byte alt, byte neu)
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31
TPicSim Testprogramme/TPicSim1X.LST
Normal file
31
TPicSim Testprogramme/TPicSim1X.LST
Normal file
@ -0,0 +1,31 @@
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00001 ;TPicSim1
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00002 ;Programm zum Test des 16F84-Simulators.
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00003 ;Es werden alle Literal-Befehle gepr?ft
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00004 ;(c) St. Lehmann
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00005 ;Ersterstellung: 23.03.2016
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00006 ;
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00007
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00008 ;Definition einiger Symbole
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00009 ;zuerst Hardware-Register
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00010 status equ 03h
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00011 ra equ 05h
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00012 rb equ 06h
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00013
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00014 ;f?r den Benutzer frei verwendbare Register
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00015 count equ 0ch
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00016
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00017 ;Definition des Prozessors
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00018 device 16F84
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00019
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00020 ;Festlegen des Codebeginns
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00021 org 0
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00022 start
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0000 3011 00023 movlw 11h ;in W steht nun 11h, Statusreg. unver?n
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0001 0085 00024 MOVWF 05h
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00025
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0002 3012 00026 movlw 12h ;in W steht nun 11h, Statusreg. unver?n
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0003 0086 00027 MOVWF 06h
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00028
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00029 ende
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0004 2804 00030 goto ende ;Endlosschleife, verhindert Nirwana
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00031
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@ -21,12 +21,10 @@ count equ 0ch
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org 0
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org 0
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start
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start
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movlw 11h ;in W steht nun 11h, Statusreg. unver?ndert
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movlw 11h ;in W steht nun 11h, Statusreg. unver?ndert
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andlw 30h ;W = 10h, C=x, DC=x, Z=0
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MOVWF 05h
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iorlw 0Dh ;W = 1Dh, C=x, DC=x, Z=0
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sublw 3Dh ;W = 20h, C=1, DC=1, Z=0
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xorlw 20h ;W = 00h, C=1, DC=1, Z=1
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addlw 25h ;W = 25h, C=0, DC=0, Z=0
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movlw 12h ;in W steht nun 11h, Statusreg. unver?ndert
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MOVWF 06h
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ende
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ende
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goto ende ;Endlosschleife, verhindert Nirwana
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goto ende ;Endlosschleife, verhindert Nirwana
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